Reduced Instruction Set computer (RISC) is a processor hard-wired design strategy based on simpler instruction set and to provide faster clock speed. It has more general purpose registers. In computer architecture to execute each instruction, there is a separate electronic circuitry in the control unit, which produces required clock signals, this approach of designing the control section of the CPU is known as RISC design.
If the instructions are more this approach will become complex, so RISC microprocessors use a small number of simple instruction and few addressing modes. RISC processors are faster compare to CISC. Examples of RISC processors are DEC’s Alpha 21064, Sun’s Sparc, PowerPc.
- Simple and Small Instruction set
- Less addressing modes
- Faster clock speed
- Instruction pipeline can be implemented easily
- Best Use for Real Time applications
- Shortens the Execution time by reducing the clocks cycle per instruction
- Compiler design is complex